diff lwasm/instab.c @ 357:0cf4948d53b4

Checkpoint - adding actual cpu instructions
author lost@starbug
date Wed, 31 Mar 2010 20:12:20 -0600
parents 7166254491ed
children cc154dc614fe
line wrap: on
line diff
--- a/lwasm/instab.c	Wed Mar 31 18:46:32 2010 -0600
+++ b/lwasm/instab.c	Wed Mar 31 20:12:20 2010 -0600
@@ -31,6 +31,74 @@
 #define insn_resolve_inh NULL
 extern EMITFUNC(insn_emit_inh);
 
+// register to register
+extern PARSEFUNC(insn_parse_rtor);
+#define insn_resolve_rtor NULL
+extern EMITFUNC(insn_emit_rtor);
+
+// TFM and variants
+extern PARSEFUNC(insn_parse_tfmrtor);
+#define insn_resolve_tfmrtor NULL
+extern EMITFUNC(insn_emit_tfmrtor);
+extern PARSEFUNC(insn_parse_tfm);
+#define insn_resolve_tfm NULL
+extern EMITFUNC(insn_emit_tfm);
+
+// register list
+extern PARSEFUNC(insn_parse_rlist);
+#define insn_resolve_rlist NULL
+extern EMITFUNC(insn_emit_rlist);
+
+// indexed
+extern PARSEFUNC(insn_parse_indexed);
+extern RESOLVEFUNC(insn_resolve_indexed);
+extern EMITFUNC(insn_emit_indexed);
+
+// generic 32 bit immediate
+extern PARSEFUNC(insn_parse_gen32);
+extern RESOLVEFUNC(insn_resolve_gen32);
+extern EMITFUNC(insn_emit_gen32);
+
+// generic 16 bit immediate
+extern PARSEFUNC(insn_parse_gen16);
+extern RESOLVEFUNC(insn_resolve_gen16);
+extern EMITFUNC(insn_emit_gen16);
+
+// generic 8 bit immediate
+extern PARSEFUNC(insn_parse_gen8);
+extern RESOLVEFUNC(insn_resolve_gen8);
+extern EMITFUNC(insn_emit_gen8);
+
+// generic no immediate
+extern PARSEFUNC(insn_parse_gen0);
+extern RESOLVEFUNC(insn_resolve_gen0);
+extern EMITFUNC(insn_emit_gen0);
+
+// logic memory
+extern PARSEFUNC(insn_parse_logicmem);
+extern RESOLVEFUNC(insn_resolve_logicmem);
+extern EMITFUNC(insn_emit_logicmem);
+
+// logic memory
+extern PARSEFUNC(insn_parse_imm8);
+#define insn_resolve_imm8 NULL
+extern EMITFUNC(insn_emit_imm8);
+
+// bit to bit ops
+extern PARSEFUNC(insn_parse_bitbit);
+#define insn_resolve_bitbit NULL
+extern EMITFUNC(insn_emit_bitbit);
+
+// 8 bit relative
+extern PARSEFUNC(insn_parse_rel8);
+#define insn_resolve_rel8 NULL
+extern EMITFUNC(insn_emit_rel8);
+
+// 16 bit relative
+extern PARSEFUNC(insn_parse_rel16);
+#define insn_resolve_rel16 NULL
+extern EMITFUNC(insn_emit_rel16);
+
 // MACRO pseudo op
 extern PARSEFUNC(pseudo_parse_macro);
 #define pseudo_resolve_macro	NULL
@@ -215,8 +283,8 @@
 
 instab_t instab[] =
 {
-/*
-	{ "abx",		{	0x3a,	-1,		-1,		-1	},	insn_parse_inh,			insn_resolve_inh,				lwasm_emit_inh,				lwasm_insn_normal},
+
+	{ "abx",		{	0x3a,	-1,		-1,		-1	},	insn_parse_inh,			insn_resolve_inh,				insn_emit_inh,				lwasm_insn_normal},
 	{ "adca",		{	0x99,	0xa9,	0xb9,	0x89},	insn_parse_gen8,		insn_resolve_gen8,				insn_emit_gen8,				lwasm_insn_normal},
 	{ "adcb",		{	0xd9,	0xe9,	0xf9,	0xc9},	insn_parse_gen8,		insn_resolve_gen8,				insn_emit_gen8,				lwasm_insn_normal},
 	{ "adcd",		{	0x1099,	0x10a9,	0x10b9,	0x1089},insn_parse_gen16,		insn_resolve_gen16,				insn_emit_gen16,			lwasm_insn_is6309},
@@ -382,9 +450,9 @@
 	{ "nega",		{	0x40,	-1,		-1,		-1	},	insn_parse_inh,			insn_resolve_inh,				insn_emit_inh,				lwasm_insn_normal},
 	{ "negb",		{	0x50,	-1,		-1,		-1	},	insn_parse_inh,			insn_resolve_inh,				insn_emit_inh,				lwasm_insn_normal},
 	{ "negd",		{	0x1040,	-1,		-1,		-1	},	insn_parse_inh,			insn_resolve_inh,				insn_emit_inh,				lwasm_insn_is6309},
-*/
+
 	{ "nop",		{	0x12,	-1,		-1,		-1	},	insn_parse_inh,			insn_resolve_inh,				insn_emit_inh,				lwasm_insn_normal},
-/*	
+	
 	{ "oim",		{	0x01,	0x61,	0x71,	-1	},	insn_parse_logicmem,	insn_resolve_logicmem,			insn_emit_logicmem,			lwasm_insn_is6309},
 	{ "ora",		{	0x9a,	0xaa,	0xba,	0x8a},	insn_parse_gen8,		insn_resolve_gen8,				insn_emit_gen8,				lwasm_insn_normal},
 	{ "orb",		{	0xda,	0xea,	0xfa,	0xca},	insn_parse_gen8,		insn_resolve_gen8,				insn_emit_gen8,				lwasm_insn_normal},
@@ -472,7 +540,7 @@
 	{ "tste",		{	0x114d,	-1,		-1,		-1	},	insn_parse_inh,			insn_resolve_inh,				insn_emit_inh,				lwasm_insn_is6309},
 	{ "tstf",		{	0x115d,	-1,		-1,		-1	},	insn_parse_inh,			insn_resolve_inh,				insn_emit_inh,				lwasm_insn_is6309},
 	{ "tstw",		{	0x105d,	-1,		-1,		-1	},	insn_parse_inh,			insn_resolve_inh,				insn_emit_inh,				lwasm_insn_is6309},
-*/
+
 	{ "org",		{	-1, 	-1, 	-1, 	-1 },	pseudo_parse_org,		pseudo_resolve_org,				pseudo_emit_org,			lwasm_insn_normal},
 	{ "equ",		{	-1, 	-1, 	-1, 	-1 },	pseudo_parse_equ,		pseudo_resolve_equ,				pseudo_emit_equ,			lwasm_insn_setsym},
 	{ "=",			{	-1, 	-1, 	-1, 	-1 },	pseudo_parse_equ,		pseudo_resolve_equ,				pseudo_emit_equ,			lwasm_insn_setsym},