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comparison lwasm/instab.c @ 357:0cf4948d53b4

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Checkpoint - adding actual cpu instructions
author lost@starbug
date Wed, 31 Mar 2010 20:12:20 -0600
parents 7166254491ed
children cc154dc614fe
comparison
equal deleted inserted replaced
356:7166254491ed 357:0cf4948d53b4
29 // inherent 29 // inherent
30 extern PARSEFUNC(insn_parse_inh); 30 extern PARSEFUNC(insn_parse_inh);
31 #define insn_resolve_inh NULL 31 #define insn_resolve_inh NULL
32 extern EMITFUNC(insn_emit_inh); 32 extern EMITFUNC(insn_emit_inh);
33 33
34 // register to register
35 extern PARSEFUNC(insn_parse_rtor);
36 #define insn_resolve_rtor NULL
37 extern EMITFUNC(insn_emit_rtor);
38
39 // TFM and variants
40 extern PARSEFUNC(insn_parse_tfmrtor);
41 #define insn_resolve_tfmrtor NULL
42 extern EMITFUNC(insn_emit_tfmrtor);
43 extern PARSEFUNC(insn_parse_tfm);
44 #define insn_resolve_tfm NULL
45 extern EMITFUNC(insn_emit_tfm);
46
47 // register list
48 extern PARSEFUNC(insn_parse_rlist);
49 #define insn_resolve_rlist NULL
50 extern EMITFUNC(insn_emit_rlist);
51
52 // indexed
53 extern PARSEFUNC(insn_parse_indexed);
54 extern RESOLVEFUNC(insn_resolve_indexed);
55 extern EMITFUNC(insn_emit_indexed);
56
57 // generic 32 bit immediate
58 extern PARSEFUNC(insn_parse_gen32);
59 extern RESOLVEFUNC(insn_resolve_gen32);
60 extern EMITFUNC(insn_emit_gen32);
61
62 // generic 16 bit immediate
63 extern PARSEFUNC(insn_parse_gen16);
64 extern RESOLVEFUNC(insn_resolve_gen16);
65 extern EMITFUNC(insn_emit_gen16);
66
67 // generic 8 bit immediate
68 extern PARSEFUNC(insn_parse_gen8);
69 extern RESOLVEFUNC(insn_resolve_gen8);
70 extern EMITFUNC(insn_emit_gen8);
71
72 // generic no immediate
73 extern PARSEFUNC(insn_parse_gen0);
74 extern RESOLVEFUNC(insn_resolve_gen0);
75 extern EMITFUNC(insn_emit_gen0);
76
77 // logic memory
78 extern PARSEFUNC(insn_parse_logicmem);
79 extern RESOLVEFUNC(insn_resolve_logicmem);
80 extern EMITFUNC(insn_emit_logicmem);
81
82 // logic memory
83 extern PARSEFUNC(insn_parse_imm8);
84 #define insn_resolve_imm8 NULL
85 extern EMITFUNC(insn_emit_imm8);
86
87 // bit to bit ops
88 extern PARSEFUNC(insn_parse_bitbit);
89 #define insn_resolve_bitbit NULL
90 extern EMITFUNC(insn_emit_bitbit);
91
92 // 8 bit relative
93 extern PARSEFUNC(insn_parse_rel8);
94 #define insn_resolve_rel8 NULL
95 extern EMITFUNC(insn_emit_rel8);
96
97 // 16 bit relative
98 extern PARSEFUNC(insn_parse_rel16);
99 #define insn_resolve_rel16 NULL
100 extern EMITFUNC(insn_emit_rel16);
101
34 // MACRO pseudo op 102 // MACRO pseudo op
35 extern PARSEFUNC(pseudo_parse_macro); 103 extern PARSEFUNC(pseudo_parse_macro);
36 #define pseudo_resolve_macro NULL 104 #define pseudo_resolve_macro NULL
37 #define pseudo_emit_macro NULL 105 #define pseudo_emit_macro NULL
38 106
213 extern RESOLVEFUNC(pseudo_resolve_align); 281 extern RESOLVEFUNC(pseudo_resolve_align);
214 extern EMITFUNC(pseudo_emit_align); 282 extern EMITFUNC(pseudo_emit_align);
215 283
216 instab_t instab[] = 284 instab_t instab[] =
217 { 285 {
218 /* 286
219 { "abx", { 0x3a, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, lwasm_emit_inh, lwasm_insn_normal}, 287 { "abx", { 0x3a, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_normal},
220 { "adca", { 0x99, 0xa9, 0xb9, 0x89}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal}, 288 { "adca", { 0x99, 0xa9, 0xb9, 0x89}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal},
221 { "adcb", { 0xd9, 0xe9, 0xf9, 0xc9}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal}, 289 { "adcb", { 0xd9, 0xe9, 0xf9, 0xc9}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal},
222 { "adcd", { 0x1099, 0x10a9, 0x10b9, 0x1089},insn_parse_gen16, insn_resolve_gen16, insn_emit_gen16, lwasm_insn_is6309}, 290 { "adcd", { 0x1099, 0x10a9, 0x10b9, 0x1089},insn_parse_gen16, insn_resolve_gen16, insn_emit_gen16, lwasm_insn_is6309},
223 { "adcr", { 0x1031, -1, -1, -1 }, insn_parse_rtor, insn_resolve_rtor, insn_emit_rtor, lwasm_insn_is6309}, 291 { "adcr", { 0x1031, -1, -1, -1 }, insn_parse_rtor, insn_resolve_rtor, insn_emit_rtor, lwasm_insn_is6309},
224 { "adda", { 0x9b, 0xab, 0xbb, 0x8b}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal}, 292 { "adda", { 0x9b, 0xab, 0xbb, 0x8b}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal},
380 448
381 { "neg", { 0x00, 0x60, 0x70, -1 }, insn_parse_gen0, insn_resolve_gen0, insn_emit_gen0, lwasm_insn_normal}, 449 { "neg", { 0x00, 0x60, 0x70, -1 }, insn_parse_gen0, insn_resolve_gen0, insn_emit_gen0, lwasm_insn_normal},
382 { "nega", { 0x40, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_normal}, 450 { "nega", { 0x40, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_normal},
383 { "negb", { 0x50, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_normal}, 451 { "negb", { 0x50, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_normal},
384 { "negd", { 0x1040, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309}, 452 { "negd", { 0x1040, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309},
385 */ 453
386 { "nop", { 0x12, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_normal}, 454 { "nop", { 0x12, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_normal},
387 /* 455
388 { "oim", { 0x01, 0x61, 0x71, -1 }, insn_parse_logicmem, insn_resolve_logicmem, insn_emit_logicmem, lwasm_insn_is6309}, 456 { "oim", { 0x01, 0x61, 0x71, -1 }, insn_parse_logicmem, insn_resolve_logicmem, insn_emit_logicmem, lwasm_insn_is6309},
389 { "ora", { 0x9a, 0xaa, 0xba, 0x8a}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal}, 457 { "ora", { 0x9a, 0xaa, 0xba, 0x8a}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal},
390 { "orb", { 0xda, 0xea, 0xfa, 0xca}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal}, 458 { "orb", { 0xda, 0xea, 0xfa, 0xca}, insn_parse_gen8, insn_resolve_gen8, insn_emit_gen8, lwasm_insn_normal},
391 { "orcc", { 0x1a, -1, -1, 0x1a }, insn_parse_imm8, insn_resolve_imm8, insn_emit_imm8, lwasm_insn_normal}, 459 { "orcc", { 0x1a, -1, -1, 0x1a }, insn_parse_imm8, insn_resolve_imm8, insn_emit_imm8, lwasm_insn_normal},
392 { "ord", { 0x109a, 0x10aa, 0x10ba, 0x108a},insn_parse_gen16, insn_resolve_gen16, insn_emit_gen16, lwasm_insn_is6309}, 460 { "ord", { 0x109a, 0x10aa, 0x10ba, 0x108a},insn_parse_gen16, insn_resolve_gen16, insn_emit_gen16, lwasm_insn_is6309},
470 { "tstb", { 0x5d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_normal}, 538 { "tstb", { 0x5d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_normal},
471 { "tstd", { 0x104d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309}, 539 { "tstd", { 0x104d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309},
472 { "tste", { 0x114d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309}, 540 { "tste", { 0x114d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309},
473 { "tstf", { 0x115d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309}, 541 { "tstf", { 0x115d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309},
474 { "tstw", { 0x105d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309}, 542 { "tstw", { 0x105d, -1, -1, -1 }, insn_parse_inh, insn_resolve_inh, insn_emit_inh, lwasm_insn_is6309},
475 */ 543
476 { "org", { -1, -1, -1, -1 }, pseudo_parse_org, pseudo_resolve_org, pseudo_emit_org, lwasm_insn_normal}, 544 { "org", { -1, -1, -1, -1 }, pseudo_parse_org, pseudo_resolve_org, pseudo_emit_org, lwasm_insn_normal},
477 { "equ", { -1, -1, -1, -1 }, pseudo_parse_equ, pseudo_resolve_equ, pseudo_emit_equ, lwasm_insn_setsym}, 545 { "equ", { -1, -1, -1, -1 }, pseudo_parse_equ, pseudo_resolve_equ, pseudo_emit_equ, lwasm_insn_setsym},
478 { "=", { -1, -1, -1, -1 }, pseudo_parse_equ, pseudo_resolve_equ, pseudo_emit_equ, lwasm_insn_setsym}, 546 { "=", { -1, -1, -1, -1 }, pseudo_parse_equ, pseudo_resolve_equ, pseudo_emit_equ, lwasm_insn_setsym},
479 547
480 { "extern", { -1, -1, -1, -1 }, pseudo_parse_extern, pseudo_resolve_extern, pseudo_emit_extern, lwasm_insn_setsym}, 548 { "extern", { -1, -1, -1, -1 }, pseudo_parse_extern, pseudo_resolve_extern, pseudo_emit_extern, lwasm_insn_setsym},