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1 /*
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2 * insn_misc.c
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3 *
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4 * parsing miscelaneous addressing modes
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5 */
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6
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7 #include <ctype.h>
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8 #include <stdio.h>
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9 #include <string.h>
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10 #include "lwasm.h"
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11 #include "instab.h"
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12
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13 extern void insn_gen_aux(asmstate_t *as, sourceline_t *cl, char **optr, int *b1, int *b2, int *b3, int *op);
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14
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15 void insn_inh(asmstate_t *as, sourceline_t *cl, char **optr)
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16 {
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17 cl -> addrmode = OPER_INH;
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18 emitop(instab[cl -> opcode].ops[0]);
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19 }
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20
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21 void insn_rtor(asmstate_t *as, sourceline_t *cl, char **optr)
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22 {
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23 int r0, r1;
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24 static const char *regs = "D X Y U S PCW V A B CCDP0 0 E F ";
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25
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26 cl -> addrmode = OPER_RTOR;
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27 emitop(instab[cl -> opcode].ops[0]);
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28 // register to register (r0,r1)
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29 // registers are in order:
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30 // D,X,Y,U,S,PC,W,V
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31 // A,B,CC,DP,0,0,E,F
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32 r0 = lookupreg(regs, optr);
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33 if (r0 < 0 || *(*optr)++ != ',')
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34 {
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35 errorp1(ERR_BADOPER);
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36 r0 = r1 = 0;
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37 }
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38 else
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39 {
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40 r1 = lookupreg(regs, optr);
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41 if (r1 < 0)
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42 {
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43 errorp1(ERR_BADOPER);
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44 r0=r1=0;
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45 }
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46 }
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47 emit((r0 << 4) | r1);
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48 }
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49
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50 void insn_rlist(asmstate_t *as, sourceline_t *cl, char **optr)
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51 {
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52 int rb = 0;
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53 int rn;
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54 static const char *regs = "CCA B DPX Y U PCD S ";
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55
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56 emitop(instab[cl -> opcode].ops[0]);
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57 cl -> addrmode = OPER_RLIST;
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58 while (**optr && !isspace(**optr))
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59 {
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60 rn = lookupreg(regs, optr);
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61 if (rn < 0)
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62 {
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63 printf("Bad reg (%s)\n", *optr);
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64 errorp1(ERR_BADOPER);
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65 emit(0);
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66 return;
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67 }
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68 if (**optr && **optr != ',' && !isspace(**optr))
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69 {
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70 printf("Bad char (%c)\n", **optr);
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71 errorp1(ERR_BADOPER);
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72 emit(0);
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73 return;
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74 }
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75 if (**optr == ',')
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76 (*optr)++;
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77 if (rn == 8)
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78 rn = 6;
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79 else if (rn == 9)
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80 rn = 0x40;
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81 else
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82 rn = 1 << rn;
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83 rb |= rn;
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84 }
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85 emit(rb);
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86 }
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87
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88 // for aim, oim, eim, tim
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89 void insn_logicmem(asmstate_t *as, sourceline_t *cl, char **optr)
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90 {
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91 int rval, v1;
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92 int b1, b2, b3, op;
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93
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94 if (**optr == '#')
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95 (*optr)++;
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96
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97 rval = eval_expr(as, cl, optr, &v1);
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98 if (rval < 0)
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99 return;
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100
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101 if (v1 < -128 || v1 > 255)
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102 {
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103 errorp2(ERR_OVERFLOW);
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104 v1 = 0;
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105 }
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106
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107 if (**optr != ',' && **optr != ';')
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108 {
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109 errorp1(ERR_BADOPER);
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110 return;
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111 }
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112
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113 (*optr)++;
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114
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115 // now we have a general addressing mode - call for it
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116 insn_gen_aux(as, cl, optr, &b1, &b2, &b3, &op);
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117
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118 emitop(op);
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119 emit(v1 & 0xff);
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120 if (b1 != -1)
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121 {
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122 emit(b1);
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123 }
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124 if (b2 != -1)
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125 {
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126 emit(b2);
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127 }
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128 if (b3 != -1)
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129 {
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130 emit(b3);
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131 }
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132 }
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133
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134 void insn_tfm(asmstate_t *as, sourceline_t *cl, char **optr)
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135 {
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136 static const char *reglist = "DXYUS AB 00EF";
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137 int r0, r1;
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138 char *c;
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139 int tfm = 0;
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140
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141 cl -> addrmode = OPER_TFM;
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142
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143 c = strchr(reglist, toupper(*(*optr)++));
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144 if (!c)
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145 {
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146 errorp1(ERR_BADOPER);
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147 return;
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148 }
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149 r0 = c - reglist;
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150 if (**optr == '+')
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151 {
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152 (*optr)++;
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153 tfm = 1;
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154 }
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155 else if (**optr == '-')
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156 {
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157 (*optr)++;
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158 tfm = 2;
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159 }
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160 if (*(*optr)++ != ',')
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161 {
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162 errorp1(ERR_BADOPER);
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163 return;
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164 }
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165 c = strchr(reglist, toupper(*(*optr)++));
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166 if (!c)
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167 {
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168 errorp1(ERR_BADOPER);
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169 return;
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170 }
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171 r1 = c - reglist;
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172
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173 if (**optr == '+')
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174 {
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175 (*optr)++;
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176 tfm |= 4;
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177 }
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178 else if (**optr == '-')
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179 {
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180 (*optr)++;
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181 tfm |= 8;
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182 }
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183
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184 if (**optr && !isspace(**optr))
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185 {
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186 errorp1(ERR_BADOPER);
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187 return;
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188 }
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189
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190 // valid values of tfm here are:
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191 // 1: r0+,r1 (2)
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192 // 4: r0,r1+ (3)
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193 // 5: r0+,r1+ (0)
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194 // 10: r0-,r1- (1)
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195 switch (tfm)
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196 {
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197 case 5: //r0+,r1+
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198 emitop(instab[cl -> opcode].ops[0]);
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199 break;
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200 case 10: //r0-,r1-
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201 emitop(instab[cl -> opcode].ops[1]);
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202 break;
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203 case 1: // r0+,r1
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204 emitop(instab[cl -> opcode].ops[2]);
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205 break;
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206 case 4: // r0,r1+
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207 emitop(instab[cl -> opcode].ops[3]);
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208 break;
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209 default:
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210 errorp1(ERR_BADOPER);
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211 return;
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212 }
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213 emit((r0 << 4) | r1);
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214 }
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215
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216 void insn_bitbit(asmstate_t *as, sourceline_t *cl, char **optr)
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217 {
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218 int r;
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219 int rval;
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220 int v1;
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221 int tv;
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222
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223 emitop(instab[cl -> opcode].ops[0]);
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224
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225 cl -> addrmode = OPER_BITBIT;
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226
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227 r = toupper(*(*optr)++);
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228 if (r == 'A')
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229 r = 1;
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230 else if (r == 'B')
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231 r = 2;
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232 else if (r == 'C' && toupper(**optr) == 'C')
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233 {
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234 r = 0;
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235 (*optr)++;
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236 }
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237 else
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238 {
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239 errorp1(ERR_BADREG);
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240 return;
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241 }
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242 if (*(*optr)++ != ',')
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243 {
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244 errorp1(ERR_BADOPER);
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245 return;
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246 }
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247 rval = eval_expr(as, cl, optr, &v1);
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248 if (v1 < 0 || v1 > 7)
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249 {
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250 errorp2(ERR_OVERFLOW3);
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251 v1 = 0;
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252 }
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253 if (*(*optr)++ != ',')
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254 {
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255 errorp1(ERR_BADOPER);
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256 return;
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257 }
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258 r = (r << 6) | (v1 << 3);
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259 rval = eval_expr(as, cl, optr, &v1);
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260 if (v1 < 0 || v1 > 7)
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261 {
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262 errorp2(ERR_OVERFLOW3);
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263 v1 = 0;
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264 }
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265 if (*(*optr)++ != ',')
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266 {
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267 errorp1(ERR_BADOPER);
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268 return;
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269 }
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270 r |= v1;
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271
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272 emit(r);
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273
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274 // ignore base page address modifier
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275 if (**optr == '<')
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276 optr++;
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277
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278 rval = eval_expr(as, cl, optr, &v1);
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279 v1 &= 0xFFFF;
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280 tv = v1 - ((cl -> dpval) << 8);
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281 if (tv > 0xFF || tv < 0)
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282 errorp2(ERR_OVERFLOW);
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283 emit(tv & 0xff);
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284 }
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285
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286 void insn_rel8(asmstate_t *as, sourceline_t *cl, char **optr)
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287 {
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288 int v1, rval;
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289
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290 emitop(instab[cl -> opcode].ops[0]);
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291 cl -> addrmode = OPER_REL8;
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292 rval = eval_expr(as, cl, optr, &v1);
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293 v1 &= 0xFFFF;
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294 v1 -= cl -> addr + 2;
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295 if (v1 < -128 || v1 > 127)
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296 errorp2(ERR_OVERFLOW);
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297 v1 &= 0xFFFF;
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298 emit(v1 & 0xff);
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299 }
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300
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301 void insn_rel16(asmstate_t *as, sourceline_t *cl, char **optr)
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302 {
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303 int v1, rval;
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304
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305 emitop(instab[cl -> opcode].ops[0]);
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306 cl -> addrmode = OPER_REL16;
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307 rval = eval_expr(as, cl, optr, &v1);
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308 v1 &= 0xFFFF;
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309 v1 -= cl -> addr + 3;
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310 if (instab[cl -> opcode].ops[0] > 0xff)
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311 v1 -= 1;
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312 v1 &= 0xFFFF;
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313 emit(v1 >> 8);
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314 emit(v1 & 0xff);
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315 }
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