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Add << prefix to force 5 bit offsets in indexed modes Rounding out the compliment of operand size prefixes, we now have "<<" to mean "force 5 bits". According to Steve Bjork, this was the "official" way to do this since 1980. However, I have no official Motorola source for that. It does suggest that the choice of "<<" is consistent with other (historical) assemblers, though. Either way, it seems the most logical choice while avoiding any conflicts with legal source code, so "<<" it is.
author William Astle <lost@l-w.ca>
date Mon, 23 Jul 2018 17:45:18 -0600
parents cad5937314cb
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>3.11. Convenience Instructions</A
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>&#13;Similar to the 6800 compatibility instructions (pragma 6800compat) these
pragma 6809conv and pragma 6309conv enable convenience extensions to the
6809 and 6309 instruction set.  Originally intended for compatibility with
the MACRO-80c assembler, these have proven useful in large codebases that
target both the 6809 and the 6309.</P
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>&#13;The 6809 extensions are straightforward with the exception of "TSTD" which
assembles as "STD -2,S".  A benefit of using these is they will "just work"
and take on their 6309 equivalent when you enable 6309 assembly mode. 
Supported instructions: ASRD, CLRD,   COMD,   LSLD,   LSRD,   NEGD,   TSTD.</P
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>&#13;6309 extensions are based on common patterns described by Chris Burke and
Darren Atkinson in their 6309 documentation and include the following
instructions: ASRQ,   CLRQ,   COMQ,   LSLE,   LSLF,   LSLQ,   LSRQ,   NEGE,
   NEGF,   NEGW,   NEGQ,   TSTQ.</P
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