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comparison lwasm/cycle.c @ 475:b9917c4dc6cf

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Fix cycle counts for asr, cmpe, cmpf and cmpw.
author Doug Masten <doug@dougmasten.com>
date Mon, 10 Dec 2018 21:27:08 -0700
parents 0af33282b518
children 9c24336fa76c
comparison
equal deleted inserted replaced
474:74d0c394666e 475:b9917c4dc6cf
118 { 0x78, 7, 6, 0 }, 118 { 0x78, 7, 6, 0 },
119 119
120 { 0x47, 2, 1, 0 }, // ASR 120 { 0x47, 2, 1, 0 }, // ASR
121 { 0x57, 2, 1, 0 }, 121 { 0x57, 2, 1, 0 },
122 { 0x1047, 3, 2, 0 }, 122 { 0x1047, 3, 2, 0 },
123 { 0x07, 6, 6, 0 }, 123 { 0x07, 6, 5, 0 },
124 { 0x67, 6, 6, CYCLE_ADJ }, 124 { 0x67, 6, 6, CYCLE_ADJ },
125 { 0x77, 7, 6, 0 }, 125 { 0x77, 7, 6, 0 },
126 126
127 { 0x1130, 7, 6, 0 }, // BAND 127 { 0x1130, 7, 6, 0 }, // BAND
128 { 0x1131, 7, 6, 0 }, // BIAND 128 { 0x1131, 7, 6, 0 }, // BIAND
190 { 0x1083, 5, 4, 0 }, // CMPD 190 { 0x1083, 5, 4, 0 }, // CMPD
191 { 0x1093, 7, 5, 0 }, 191 { 0x1093, 7, 5, 0 },
192 { 0x10a3, 7, 6, CYCLE_ADJ }, 192 { 0x10a3, 7, 6, CYCLE_ADJ },
193 { 0x10b3, 8, 6, 0 }, 193 { 0x10b3, 8, 6, 0 },
194 194
195 { 0x1081, 3, 3, 0 }, // CMPE 195 { 0x1181, 3, 3, 0 }, // CMPE
196 { 0x1091, 5, 4, 0 }, 196 { 0x1191, 5, 4, 0 },
197 { 0x10a1, 5, 5, CYCLE_ADJ }, 197 { 0x11a1, 5, 5, CYCLE_ADJ },
198 { 0x10b1, 6, 5, 0 }, 198 { 0x11b1, 6, 5, 0 },
199 199
200 { 0x10c1, 3, 3, 0 }, // CMPF 200 { 0x11c1, 3, 3, 0 }, // CMPF
201 { 0x10d1, 5, 4, 0 }, 201 { 0x11d1, 5, 4, 0 },
202 { 0x10e1, 5, 5, CYCLE_ADJ }, 202 { 0x11e1, 5, 5, CYCLE_ADJ },
203 { 0x10f1, 6, 5, 0 }, 203 { 0x11f1, 6, 5, 0 },
204 204
205 { 0x118c, 5, 4, 0 }, // CMPS 205 { 0x118c, 5, 4, 0 }, // CMPS
206 { 0x119c, 7, 5, 0 }, 206 { 0x119c, 7, 5, 0 },
207 { 0x11ac, 7, 6, CYCLE_ADJ }, 207 { 0x11ac, 7, 6, CYCLE_ADJ },
208 { 0x11bc, 8, 6, 0 }, 208 { 0x11bc, 8, 6, 0 },
210 { 0x1183, 5, 4, 0 }, // CMPU 210 { 0x1183, 5, 4, 0 }, // CMPU
211 { 0x1193, 7, 5, 0 }, 211 { 0x1193, 7, 5, 0 },
212 { 0x11a3, 7, 6, CYCLE_ADJ }, 212 { 0x11a3, 7, 6, CYCLE_ADJ },
213 { 0x11b3, 8, 6, 0 }, 213 { 0x11b3, 8, 6, 0 },
214 214
215 { 0x1181, 5, 4, 0 }, // CMPW 215 { 0x1081, 5, 4, 0 }, // CMPW
216 { 0x1191, 7, 5, 0 }, 216 { 0x1091, 7, 5, 0 },
217 { 0x11a1, 7, 6, CYCLE_ADJ }, 217 { 0x10a1, 7, 6, CYCLE_ADJ },
218 { 0x11b1, 8, 6, 0 }, 218 { 0x10b1, 8, 6, 0 },
219 219
220 { 0x8c, 4, 3, 0 }, // CMPX 220 { 0x8c, 4, 3, 0 }, // CMPX
221 { 0x9c, 6, 4, 0 }, 221 { 0x9c, 6, 4, 0 },
222 { 0xac, 6, 5, CYCLE_ADJ }, 222 { 0xac, 6, 5, CYCLE_ADJ },
223 { 0xbc, 7, 5, 0 }, 223 { 0xbc, 7, 5, 0 },