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annotate lwasm/cycle.c @ 418:3832a68d83ef
Fix internal compiler error on "var2 = var1 + 1" patterns
This appears to be the correct fix. It was provided by Tormod Volden
(debian.tormod@gmail.com). The final commit is substantially different from
Tormod's submission mostly due to housecleaning (removing the old patches
and updating the README). Tormod's comments follow.
The original addhi_mem_1 "insn" instruction pattern /matches/ two
memory operands, just with the /constraint/ that these are the same
location. A pattern match tells the compiler "you should be able to use
this, but you might have to work on it to meet the constraints". For
typical constraints on registers the compiler can add "reloads", moving
stuff between registers or from memory, until the constraints are met
and the instruction can be used. However, in this case, no amount of
reloads can make two memory locations the same if they already weren't,
so the compiler breaks down and cries "unable to generate reloads".
It seems this issue only appears if optimization is enabled. The proof
is in gcc's reload.c and is left as an exercise to the reader.
Limiting the matching pattern to identical memory operands avoids
these situations, while allowing the common "var++" cases.
References:
The pattern/constraints difference is explained in
https://gcc.gnu.org/onlinedocs/gccint/Simple-Constraints.html#index-other-register-constraints-3335
author | William Astle <lost@l-w.ca> |
---|---|
date | Tue, 29 Mar 2016 21:21:49 -0600 |
parents | 0af33282b518 |
children | b9917c4dc6cf |
rev | line source |
---|---|
378 | 1 /* |
2 cycle.c | |
3 | |
4 Copyright (c) 2015 Erik Gavriluk | |
5 Dual-licensed BSD 3-CLAUSE and GPL as per below. | |
6 Thanks to John Kowalksi for cycle count verification. | |
7 | |
8 This file is part of LWTOOLS. | |
9 | |
10 LWTOOLS is free software: you can redistribute it and/or modify it under the | |
11 terms of the GNU General Public License as published by the Free Software | |
12 Foundation, either version 3 of the License, or (at your option) any later | |
13 version. | |
14 | |
15 This program is distributed in the hope that it will be useful, but WITHOUT | |
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
18 more details. | |
19 | |
20 You should have received a copy of the GNU General Public License along with | |
21 this program. If not, see <http://www.gnu.org/licenses/>. | |
22 */ | |
23 | |
24 #include "lwasm.h" | |
25 | |
26 typedef struct | |
27 { | |
28 int opc; | |
29 int cycles_6809; | |
30 int cycles_6309; | |
31 cycle_flags flags; | |
32 } cycletable_t; | |
33 | |
34 static cycletable_t cycletable[] = | |
35 { | |
36 { 0x3a, 3, 1, 0 }, // ABX | |
37 | |
38 { 0x89, 2, 2, 0 }, // ADCA | |
39 { 0x99, 4, 3, 0 }, | |
40 { 0xa9, 4, 4, CYCLE_ADJ }, | |
41 { 0xb9, 5, 4, 0 }, | |
42 | |
43 { 0xc9, 2, 2, 0 }, // ADCB | |
44 { 0xd9, 4, 3, 0 }, | |
45 { 0xe9, 4, 4, CYCLE_ADJ }, | |
46 { 0xf9, 5, 4, 0 }, | |
47 | |
48 { 0x1089, 5, 4, 0 }, // ADCD | |
49 { 0x1099, 7, 5, 0 }, | |
50 { 0x10a9, 7, 6, CYCLE_ADJ }, | |
51 { 0x10b9, 8, 6, 0 }, | |
52 | |
53 { 0x8b, 2, 2, 0 }, // ADDA | |
54 { 0x9b, 4, 3, 0 }, | |
55 { 0xab, 4, 4, CYCLE_ADJ }, | |
56 { 0xbb, 5, 4, 0 }, | |
57 | |
58 { 0xcb, 2, 2, 0 }, // ADDB | |
59 { 0xdb, 4, 3, 0 }, | |
60 { 0xeb, 4, 4, CYCLE_ADJ }, | |
61 { 0xfb, 5, 4, 0 }, | |
62 | |
63 { 0xc3, 4, 3, 0 }, // ADDD | |
64 { 0xd3, 6, 4, 0 }, | |
65 { 0xe3, 6, 5, CYCLE_ADJ }, | |
66 { 0xf3, 7, 5, 0 }, | |
67 | |
68 { 0x118b, 3, 3, 0 }, // ADDE | |
69 { 0x119b, 5, 4, 0 }, | |
70 { 0x11ab, 5, 5, CYCLE_ADJ }, | |
71 { 0x11bb, 6, 5, 0 }, | |
72 | |
73 { 0x11cb, 3, 3, 0 }, // ADDF | |
74 { 0x11db, 5, 4, 0 }, | |
75 { 0x11eb, 5, 5, CYCLE_ADJ }, | |
76 { 0x11fb, 6, 5, 0 }, | |
77 | |
78 { 0x1031, 4, 4, 0 }, // ADCR | |
79 { 0x1030, 4, 4, 0 }, // ADDR | |
80 { 0x1034, 4, 4, 0 }, // ANDR | |
81 { 0x1037, 4, 4, 0 }, // CMPR | |
82 { 0x1036, 4, 4, 0 }, // EORR | |
83 { 0x1035, 4, 4, 0 }, // ORR | |
84 { 0x1033, 4, 4, 0 }, // SBCR | |
85 { 0x1032, 4, 4, 0 }, // SUBR | |
86 | |
87 { 0x108b, 5, 4, 0 }, // ADDW | |
88 { 0x109b, 7, 5, 0 }, | |
89 { 0x10ab, 7, 6, CYCLE_ADJ }, | |
90 { 0x10bb, 8, 6, 0 }, | |
91 | |
92 { 0x02, 6, 6, 0 }, // AIM | |
93 { 0x62, 7, 7, CYCLE_ADJ }, | |
94 { 0x72, 7, 7, 0 }, | |
95 | |
96 { 0x84, 2, 2, 0 }, // ANDA | |
97 { 0x94, 4, 3, 0 }, | |
98 { 0xa4, 4, 4, CYCLE_ADJ }, | |
99 { 0xb4, 5, 4, 0 }, | |
100 | |
101 { 0xc4, 2, 2, 0 }, // ANDB | |
102 { 0xd4, 4, 3, 0 }, | |
103 { 0xe4, 4, 4, CYCLE_ADJ }, | |
104 { 0xf4, 5, 4, 0 }, | |
105 | |
106 { 0x1c, 3, 2, 0 }, // ANDCC | |
107 | |
108 { 0x1084, 5, 4, 0 }, // ANDD | |
109 { 0x1094, 7, 5, 0 }, | |
110 { 0x10a4, 7, 6, CYCLE_ADJ }, | |
111 { 0x10b4, 8, 6, 0 }, | |
112 | |
113 { 0x48, 2, 1, 0 }, // ASL | |
114 { 0x58, 2, 1, 0 }, | |
115 { 0x1048, 3, 2, 0 }, | |
116 { 0x08, 6, 5, 0 }, | |
117 { 0x68, 6, 6, CYCLE_ADJ }, | |
118 { 0x78, 7, 6, 0 }, | |
119 | |
120 { 0x47, 2, 1, 0 }, // ASR | |
121 { 0x57, 2, 1, 0 }, | |
122 { 0x1047, 3, 2, 0 }, | |
123 { 0x07, 6, 6, 0 }, | |
124 { 0x67, 6, 6, CYCLE_ADJ }, | |
125 { 0x77, 7, 6, 0 }, | |
126 | |
127 { 0x1130, 7, 6, 0 }, // BAND | |
128 { 0x1131, 7, 6, 0 }, // BIAND | |
129 { 0x1132, 7, 6, 0 }, // BOR | |
130 { 0x1133, 7, 6, 0 }, // BIOR | |
131 { 0x1134, 7, 6, 0 }, // BEOR | |
132 { 0x1135, 7, 6, 0 }, // BIEOR | |
133 | |
134 { 0x85, 2, 2, 0 }, // BITA | |
135 { 0x95, 4, 3, 0 }, | |
136 { 0xa5, 4, 4, CYCLE_ADJ }, | |
137 { 0xb5, 5, 4, 0 }, | |
138 | |
139 { 0xc5, 2, 2, 0 }, // BITB | |
140 { 0xd5, 4, 3, 0 }, | |
141 { 0xe5, 4, 4, CYCLE_ADJ }, | |
142 { 0xf5, 5, 4, 0 }, | |
143 | |
144 { 0x1085, 5, 4, 0 }, // BITD | |
145 { 0x1095, 7, 5, 0 }, | |
146 { 0x10a5, 7, 6, CYCLE_ADJ }, | |
147 { 0x10b5, 8, 6, 0 }, | |
148 | |
149 { 0x113c, 4, 4, 0 }, // BITMD | |
150 | |
151 { 0x20, 3, 3, 0 }, // BRA | |
152 { 0x21, 3, 3, 0 }, | |
153 { 0x22, 3, 3, 0 }, | |
154 { 0x23, 3, 3, 0 }, | |
155 { 0x24, 3, 3, 0 }, | |
156 { 0x25, 3, 3, 0 }, | |
157 { 0x26, 3, 3, 0 }, | |
158 { 0x27, 3, 3, 0 }, | |
159 { 0x28, 3, 3, 0 }, | |
160 { 0x29, 3, 3, 0 }, | |
161 { 0x2a, 3, 3, 0 }, | |
162 { 0x2b, 3, 3, 0 }, | |
163 { 0x2c, 3, 3, 0 }, | |
164 { 0x2d, 3, 3, 0 }, | |
165 { 0x2e, 3, 3, 0 }, | |
166 { 0x2f, 3, 3, 0 }, | |
167 | |
168 { 0x8d, 7, 6, 0 }, // BSR | |
169 | |
170 { 0x4f, 2, 1, 0 }, // CLR | |
171 { 0x5f, 2, 1, 0 }, | |
172 { 0x104f, 3, 2, 0 }, | |
173 { 0x114f, 3, 2, 0 }, | |
174 { 0x115f, 3, 2, 0 }, | |
175 { 0x105f, 3, 2, 0 }, | |
176 { 0x0f, 6, 5, 0 }, | |
177 { 0x6f, 6, 6, CYCLE_ADJ }, | |
178 { 0x7f, 7, 6, 0 }, | |
179 | |
180 { 0x81, 2, 2, 0 }, // CMPA | |
181 { 0x91, 4, 3, 0 }, | |
182 { 0xa1, 4, 4, CYCLE_ADJ }, | |
183 { 0xb1, 5, 4, 0 }, | |
184 | |
185 { 0xc1, 2, 2, 0 }, // CMPB | |
186 { 0xd1, 4, 3, 0 }, | |
187 { 0xe1, 4, 4, CYCLE_ADJ }, | |
188 { 0xf1, 5, 4, 0 }, | |
189 | |
190 { 0x1083, 5, 4, 0 }, // CMPD | |
191 { 0x1093, 7, 5, 0 }, | |
192 { 0x10a3, 7, 6, CYCLE_ADJ }, | |
193 { 0x10b3, 8, 6, 0 }, | |
194 | |
195 { 0x1081, 3, 3, 0 }, // CMPE | |
196 { 0x1091, 5, 4, 0 }, | |
197 { 0x10a1, 5, 5, CYCLE_ADJ }, | |
198 { 0x10b1, 6, 5, 0 }, | |
199 | |
200 { 0x10c1, 3, 3, 0 }, // CMPF | |
201 { 0x10d1, 5, 4, 0 }, | |
202 { 0x10e1, 5, 5, CYCLE_ADJ }, | |
203 { 0x10f1, 6, 5, 0 }, | |
204 | |
205 { 0x118c, 5, 4, 0 }, // CMPS | |
206 { 0x119c, 7, 5, 0 }, | |
207 { 0x11ac, 7, 6, CYCLE_ADJ }, | |
208 { 0x11bc, 8, 6, 0 }, | |
209 | |
210 { 0x1183, 5, 4, 0 }, // CMPU | |
211 { 0x1193, 7, 5, 0 }, | |
212 { 0x11a3, 7, 6, CYCLE_ADJ }, | |
213 { 0x11b3, 8, 6, 0 }, | |
214 | |
215 { 0x1181, 5, 4, 0 }, // CMPW | |
216 { 0x1191, 7, 5, 0 }, | |
217 { 0x11a1, 7, 6, CYCLE_ADJ }, | |
218 { 0x11b1, 8, 6, 0 }, | |
219 | |
220 { 0x8c, 4, 3, 0 }, // CMPX | |
221 { 0x9c, 6, 4, 0 }, | |
222 { 0xac, 6, 5, CYCLE_ADJ }, | |
223 { 0xbc, 7, 5, 0 }, | |
224 | |
225 { 0x108c, 5, 4, 0 }, // CMPY | |
226 { 0x109c, 7, 5, 0 }, | |
227 { 0x10ac, 7, 6, CYCLE_ADJ }, | |
228 { 0x10bc, 8, 6, 0 }, | |
229 | |
230 { 0x43, 2, 1, 0 }, // COMA | |
231 { 0x53, 2, 1, 0 }, // COMB | |
232 { 0x1043, 3, 2, 0 }, // COMD | |
233 { 0x1143, 3, 2, 0 }, // COME | |
234 { 0x1153, 3, 2, 0 }, // COMF | |
235 { 0x1053, 3, 2, 0 }, // COMW | |
236 | |
237 { 0x03, 6, 5, 0 }, // COM | |
238 { 0x63, 6, 6, CYCLE_ADJ }, | |
239 { 0x73, 7, 6, 0 }, | |
240 | |
385 | 241 { 0x3c, 22, 20, CYCLE_ESTIMATED }, // CWAI |
378 | 242 |
243 { 0x19, 2, 1, 0 }, // DAA | |
244 | |
245 { 0x4a, 2, 1, 0 }, // DECA | |
246 { 0x5a, 2, 1, 0 }, // DECB | |
247 { 0x104a, 3, 2, 0 }, // DECD | |
248 { 0x114a, 3, 2, 0 }, // DECE | |
249 { 0x115a, 3, 2, 0 }, // DECF | |
250 { 0x105a, 3, 2, 0 }, // DECW | |
251 | |
252 { 0x0a, 6, 5, 0 }, // DEC | |
253 { 0x6a, 6, 6, CYCLE_ADJ }, | |
254 { 0x7a, 7, 6, 0 }, | |
255 | |
256 { 0x118d, 25, 25, 0 }, // DIVD | |
257 { 0x119d, 27, 26, 0 }, | |
258 { 0x11ad, 27, 27, CYCLE_ADJ }, | |
259 { 0x11bd, 28, 27, 0 }, | |
260 | |
261 { 0x118e, 34, 34, 0 }, // DIVQ | |
262 { 0x119e, 36, 35, 0 }, | |
263 { 0x11ae, 36, 36, 0 }, | |
264 { 0x11be, 37, 36, 0 }, | |
265 | |
266 { 0x05, 6, 6, 0 }, // EIM | |
267 { 0x65, 7, 7, CYCLE_ADJ }, | |
268 { 0x75, 7, 7, 0 }, | |
269 | |
270 { 0x88, 2, 2, 0 }, // EORA | |
271 { 0x98, 4, 3, 0 }, | |
272 { 0xa8, 4, 4, CYCLE_ADJ }, | |
273 { 0xb8, 5, 4, 0 }, | |
274 | |
275 { 0xc8, 2, 2, 0 }, // EORB | |
276 { 0xd8, 4, 3, 0 }, | |
277 { 0xe8, 4, 4, CYCLE_ADJ }, | |
278 { 0xf8, 5, 4, 0 }, | |
279 | |
280 { 0x1088, 5, 4, 0 }, // EORD | |
281 { 0x1098, 7, 5, 0 }, | |
282 { 0x10a8, 7, 6, CYCLE_ADJ }, | |
283 { 0x10b8, 8, 6, 0 }, | |
284 | |
285 { 0x1e, 8, 5, 0 }, // EXG | |
286 | |
287 { 0x4c, 2, 1, 0 }, // INCA | |
288 { 0x5c, 2, 1, 0 }, // INCB | |
289 { 0x104c, 3, 2, 0 }, // INCD | |
290 { 0x114c, 3, 2, 0 }, // INCE | |
291 { 0x115c, 3, 2, 0 }, // INCF | |
292 { 0x105c, 3, 2, 0 }, // INCW | |
293 | |
294 { 0x0c, 6, 5, 0 }, // INC | |
295 { 0x6c, 6, 6, CYCLE_ADJ }, | |
296 { 0x7c, 7, 6, 0 }, | |
297 | |
298 { 0x0e, 3, 2, 0 }, // JMP | |
299 { 0x6e, 3, 3, CYCLE_ADJ }, | |
300 { 0x7e, 4, 3, 0 }, | |
301 | |
302 { 0x9d, 7, 6, 0 }, // JSR | |
303 { 0xad, 7, 6, CYCLE_ADJ }, | |
304 { 0xbd, 8, 7, 0 }, | |
305 | |
306 { 0x16, 5, 4, 0 }, // LBRA | |
307 { 0x17, 9, 7, 0 }, // LBSR | |
408
0af33282b518
Fix cycle counting for relative branches.
William Astle <lost@l-w.ca>
parents:
405
diff
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308 { 0x1021, 5, 5, 0 }, // LBRN |
0af33282b518
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William Astle <lost@l-w.ca>
parents:
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diff
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309 { 0x1022, 5, 5, 0 }, // remaining long branches are estimated on 6809 only: |
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William Astle <lost@l-w.ca>
parents:
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310 { 0x1023, 5, 5, 0 }, // |
0af33282b518
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William Astle <lost@l-w.ca>
parents:
405
diff
changeset
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311 { 0x1024, 5, 5, 0 }, // 6809: 5 cycles, +1 cycle if the branch is taken |
0af33282b518
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William Astle <lost@l-w.ca>
parents:
405
diff
changeset
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312 { 0x1025, 5, 5, 0 }, // 6309 native: always 5 cycles |
0af33282b518
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William Astle <lost@l-w.ca>
parents:
405
diff
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313 { 0x1026, 5, 5, 0 }, // |
0af33282b518
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William Astle <lost@l-w.ca>
parents:
405
diff
changeset
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314 { 0x1027, 5, 5, 0 }, // this is handled as a special case elsewhere |
0af33282b518
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William Astle <lost@l-w.ca>
parents:
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diff
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315 { 0x1028, 5, 5, 0 }, |
0af33282b518
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William Astle <lost@l-w.ca>
parents:
405
diff
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316 { 0x1029, 5, 5, 0 }, |
0af33282b518
Fix cycle counting for relative branches.
William Astle <lost@l-w.ca>
parents:
405
diff
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317 { 0x102a, 5, 5, 0 }, |
0af33282b518
Fix cycle counting for relative branches.
William Astle <lost@l-w.ca>
parents:
405
diff
changeset
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318 { 0x102b, 5, 5, 0 }, |
0af33282b518
Fix cycle counting for relative branches.
William Astle <lost@l-w.ca>
parents:
405
diff
changeset
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319 { 0x102c, 5, 5, 0 }, |
0af33282b518
Fix cycle counting for relative branches.
William Astle <lost@l-w.ca>
parents:
405
diff
changeset
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320 { 0x102d, 5, 5, 0 }, |
0af33282b518
Fix cycle counting for relative branches.
William Astle <lost@l-w.ca>
parents:
405
diff
changeset
|
321 { 0x102e, 5, 5, 0 }, |
0af33282b518
Fix cycle counting for relative branches.
William Astle <lost@l-w.ca>
parents:
405
diff
changeset
|
322 { 0x102f, 5, 5, 0 }, |
378 | 323 |
324 { 0x86, 2, 2, 0 }, // LDA | |
325 { 0x96, 4, 3, 0 }, | |
326 { 0xa6, 4, 4, CYCLE_ADJ }, | |
327 { 0xb6, 5, 4, 0 }, | |
328 | |
329 { 0xc6, 2, 2, 0 }, // LDB | |
330 { 0xd6, 4, 3 }, | |
331 { 0xe6, 4, 4, CYCLE_ADJ }, | |
332 { 0xf6, 5, 4, 0 }, | |
333 | |
334 { 0x1136, 7, 6, 0 }, // LDBT | |
335 | |
336 { 0xcc, 3, 3, 0 }, // LDD | |
337 { 0xdc, 5, 4, 0 }, | |
338 { 0xec, 5, 5, CYCLE_ADJ }, | |
339 { 0xfc, 6, 5, 0 }, | |
340 | |
341 { 0x1186, 3, 3, 0 }, // LDE | |
342 { 0x1196, 5, 4, 0 }, | |
343 { 0x11a6, 5, 5, CYCLE_ADJ }, | |
344 { 0x11b6, 6, 5, 0 }, | |
345 | |
346 { 0x11c6, 3, 3, 0 }, // LDF | |
347 { 0x11d6, 5, 4, 0 }, | |
348 { 0x11e6, 5, 5, CYCLE_ADJ }, | |
349 { 0x11f6, 6, 5, 0 }, | |
350 | |
351 { 0xcd, 5, 5, 0 }, // LDQ | |
352 { 0x10dc, 8, 7, 0 }, | |
353 { 0x10ec, 8, 8, CYCLE_ADJ }, | |
354 { 0x10fc, 9, 8, 0 }, | |
355 | |
356 { 0x10ce, 4, 4, 0 }, // LDS | |
357 { 0x10de, 6, 5, 0 }, | |
358 { 0x10ee, 6, 6, CYCLE_ADJ }, | |
359 { 0x10fe, 7, 6, 0 }, | |
360 | |
361 { 0xce, 3, 3, 0 }, // LDU | |
362 { 0xde, 5, 4, 0 }, | |
363 { 0xee, 5, 5, CYCLE_ADJ }, | |
364 { 0xfe, 6, 5, 0 }, | |
365 | |
366 { 0x1086, 4, 4, 0 }, // LDW | |
367 { 0x1096, 6, 5, 0 }, | |
368 { 0x10a6, 6, 6, CYCLE_ADJ }, | |
369 { 0x10b6, 7, 6, 0 }, | |
370 | |
371 { 0x8e, 3, 3, 0 }, // LDX | |
372 { 0x9e, 5, 4, 0 }, | |
373 { 0xae, 5, 5, CYCLE_ADJ }, | |
374 { 0xbe, 6, 5, 0 }, | |
375 | |
376 { 0x108e, 4, 4, 0 }, // LDY | |
377 { 0x109e, 6, 5, 0 }, | |
378 { 0x10ae, 6, 6, CYCLE_ADJ }, | |
379 { 0x10be, 7, 6, 0 }, | |
380 | |
381 { 0x113d, 5, 5, 0 }, // LDMD | |
382 | |
383 { 0x30, 4, 4, CYCLE_ADJ }, // LEA | |
384 { 0x31, 4, 4, CYCLE_ADJ }, | |
385 { 0x32, 4, 4, CYCLE_ADJ }, | |
386 { 0x33, 4, 4, CYCLE_ADJ }, | |
387 | |
388 { 0x44, 2, 1, 0 }, // LSRA | |
389 { 0x54, 2, 1, 0 }, // LSRB | |
390 { 0x1044, 3, 2, 0 }, // LSRD | |
391 { 0x1054, 3, 2, 0 }, // LSRW | |
392 | |
393 { 0x04, 6, 5, 0 }, // LSR | |
394 { 0x64, 6, 6, CYCLE_ADJ }, | |
395 { 0x74, 7, 6, 0 }, | |
396 | |
397 { 0x3d, 11, 10, 0 }, // MUL | |
398 | |
399 { 0x118f, 28, 28, 0 }, // MULD | |
400 { 0x119f, 30, 29, 0 }, | |
401 { 0x11af, 30, 30, CYCLE_ADJ }, | |
402 { 0x11bf, 31, 30, 0 }, | |
403 | |
404 { 0x40, 2, 1, 0 }, // NEGA | |
405 { 0x50, 2, 1, 0 }, // NEGB | |
406 { 0x1040, 3, 2, 0 }, // NEGD | |
407 | |
408 { 0x00, 6, 5, 0 }, // NEG | |
409 { 0x60, 6, 6, CYCLE_ADJ }, | |
410 { 0x70, 7, 6, 0 }, | |
411 | |
412 { 0x12, 2, 1, 0 }, // NOP | |
413 | |
414 { 0x01, 6, 6, 0 }, // OIM | |
415 { 0x61, 7, 7, CYCLE_ADJ }, | |
416 { 0x71, 7, 7, 0 }, | |
417 | |
418 { 0x8a, 2, 2, 0 }, // ORA | |
419 { 0x9a, 4, 3, 0 }, | |
420 { 0xaa, 4, 4, CYCLE_ADJ }, | |
421 { 0xba, 5, 4, 0 }, | |
422 | |
423 { 0xca, 2, 2, 0 }, // ORB | |
424 { 0xda, 4, 3, 0 }, | |
425 { 0xea, 4, 4, CYCLE_ADJ }, | |
426 { 0xfa, 5, 4, 0 }, | |
427 | |
428 { 0x1a, 3, 2, 0 }, // ORCC | |
429 | |
430 { 0x108a, 5, 4, 0 }, // ORD | |
431 { 0x109a, 7, 5, 0 }, | |
432 { 0x10aa, 7, 6, CYCLE_ADJ }, | |
433 { 0x10ba, 8, 6, 0 }, | |
434 | |
435 { 0x34, 5, 4, CYCLE_ADJ }, // PSHS | |
436 { 0x36, 5, 4, CYCLE_ADJ }, // PSHU | |
437 { 0x35, 5, 4, CYCLE_ADJ }, // PULS | |
438 { 0x37, 5, 4, CYCLE_ADJ }, // PULU | |
439 { 0x1038, 6, 6, 0 }, // PSHSW | |
440 { 0x103a, 6, 6, 0 }, // PSHUW | |
441 { 0x1039, 6, 6, 0 }, // PULSW | |
442 { 0x103b, 6, 6, 0 }, // PULUW | |
443 | |
444 { 0x49, 2, 1, 0 }, // ROLA | |
445 { 0x59, 2, 1, 0 }, // ROLB | |
446 { 0x1049, 3, 2, 0 }, // ROLD | |
447 { 0x1059, 3, 2, 0 }, // ROLW | |
448 | |
449 { 0x09, 6, 5, 0 }, // ROL | |
450 { 0x69, 6, 6, CYCLE_ADJ }, | |
451 { 0x79, 7, 6, 0 }, | |
452 | |
453 { 0x46, 2, 1, 0 }, // RORA | |
454 { 0x56, 2, 1, 0 }, // RORB | |
455 { 0x1046, 3, 2, 0 }, // RORD | |
456 { 0x1056, 3, 2, 0 }, // RORW | |
457 | |
458 { 0x06, 6, 5, 0 }, // ROR | |
459 { 0x66, 6, 6, CYCLE_ADJ }, | |
460 { 0x76, 7, 6, 0 }, | |
461 | |
462 { 0x3b, 6, 17, CYCLE_ESTIMATED }, // RTI | |
463 | |
464 { 0x39, 5, 4, 0 }, // RTS | |
465 | |
466 { 0x82, 2, 2, 0 }, // SBCA | |
467 { 0x92, 4, 3, 0 }, | |
468 { 0xa2, 4, 4, CYCLE_ADJ }, | |
469 { 0xb2, 5, 4, 0 }, | |
470 | |
471 { 0xc2, 2, 2, 0 }, // SBCB | |
472 { 0xd2, 4, 3, 0 }, | |
473 { 0xe2, 4, 4, CYCLE_ADJ }, | |
474 { 0xf2, 5, 4, 0 }, | |
475 | |
476 { 0x1082, 5, 4, 0 }, // SBCD | |
477 { 0x1092, 7, 5, 0 }, | |
478 { 0x10a2, 7, 6, CYCLE_ADJ }, | |
479 { 0x10b2, 8, 6, 0 }, | |
480 | |
481 { 0x1d, 2, 1, 0 }, // SEX | |
482 { 0x14, 4, 4, 0 }, // SEXW | |
483 | |
484 { 0x97, 4, 3, 0 }, // STA | |
485 { 0xa7, 4, 4, CYCLE_ADJ }, | |
486 { 0xb7, 5, 4, 0 }, | |
487 | |
488 { 0xd7, 4, 3, 0 }, // STB | |
489 { 0xe7, 4, 4, CYCLE_ADJ }, | |
490 { 0xf7, 5, 4, 0 }, | |
491 | |
492 { 0x1137, 8, 7, 0 }, // STBT | |
493 | |
494 { 0xdd, 5, 4, 0 }, // STD | |
495 { 0xed, 5, 5, CYCLE_ADJ }, | |
496 { 0xfd, 6, 5, 0 }, | |
497 | |
498 { 0x1197, 5, 4, 0 }, // STE | |
499 { 0x11a7, 5, 5, CYCLE_ADJ }, | |
500 { 0x11b7, 6, 5, 0 }, | |
501 | |
502 { 0x11d7, 5, 4, 0 }, // STF | |
503 { 0x11e7, 5, 5, CYCLE_ADJ }, | |
504 { 0x11f7, 6, 5, 0 }, | |
505 | |
506 { 0x10dd, 8, 7, 0 }, // STQ | |
507 { 0x10ed, 8, 8, CYCLE_ADJ }, | |
508 { 0x10fd, 9, 8, 0 }, | |
509 | |
510 { 0x10df, 6, 5, 0 }, // STS | |
511 { 0x10ef, 6, 6, CYCLE_ADJ }, | |
512 { 0x10ff, 7, 6, 0 }, | |
513 | |
514 { 0xdf, 5, 4, 0 }, // STU | |
515 { 0xef, 5, 5, CYCLE_ADJ }, | |
516 { 0xff, 6, 5, 0 }, | |
517 | |
518 { 0x1097, 6, 5, 0 }, // STW | |
519 { 0x10a7, 6, 6, CYCLE_ADJ }, | |
520 { 0x10b7, 7, 6, 0 }, | |
521 | |
522 { 0x9f, 5, 4, 0 }, // STX | |
523 { 0xaf, 5, 5, CYCLE_ADJ }, | |
524 { 0xbf, 6, 5, 0 }, | |
525 | |
526 { 0x109f, 6, 5, 0 }, // STY | |
527 { 0x10af, 6, 6, CYCLE_ADJ }, | |
528 { 0x10bf, 7, 6, 0 }, | |
529 | |
530 { 0x80, 2, 2, 0 }, // SUBA | |
531 { 0x90, 4, 3, 0 }, | |
532 { 0xa0, 4, 4, CYCLE_ADJ }, | |
533 { 0xb0, 5, 4, 0 }, | |
534 | |
535 { 0xc0, 2, 2, 0 }, // SUBB | |
536 { 0xd0, 4, 3, 0 }, | |
537 { 0xe0, 4, 4, CYCLE_ADJ }, | |
538 { 0xf0, 5, 4, 0 }, | |
539 | |
540 { 0x83, 4, 3, 0 }, // SUBD | |
541 { 0x93, 6, 4, 0 }, | |
542 { 0xa3, 6, 5, CYCLE_ADJ }, | |
543 { 0xb3, 7, 5, 0 }, | |
544 | |
545 { 0x1180, 3, 3, 0 }, // SUBE | |
546 { 0x1190, 5, 4, 0 }, | |
547 { 0x11a0, 5, 5, CYCLE_ADJ }, | |
548 { 0x11b0, 6, 5, 0 }, | |
549 | |
550 { 0x11c0, 3, 3, 0 }, // SUBF | |
551 { 0x11d0, 5, 4, 0 }, | |
552 { 0x11e0, 5, 5, CYCLE_ADJ }, | |
553 { 0x11f0, 6, 5, 0 }, | |
554 | |
555 { 0x1080, 5, 4, 0 }, // SUBW | |
556 { 0x1090, 7, 5, 0 }, | |
557 { 0x10a0, 7, 6, CYCLE_ADJ }, | |
558 { 0x10b0, 8, 6, 0 }, | |
559 | |
560 { 0x3f, 19, 21, 0 }, // SWI | |
561 { 0x103f, 20, 22, 0 }, // SWI2 | |
562 { 0x113f, 20, 22, 0 }, // SWI3 | |
563 | |
564 { 0x13, 2, 1, CYCLE_ESTIMATED }, // SYNC | |
565 | |
566 { 0x1f, 6, 4, 0 }, // TFR | |
567 | |
568 { 0x0b, 6, 6, CYCLE_ESTIMATED }, // TIM | |
569 { 0x6b, 7, 7, CYCLE_ADJ | CYCLE_ESTIMATED }, | |
570 { 0x7b, 5, 5, CYCLE_ESTIMATED }, | |
571 | |
572 { 0x1138, 6, 6, CYCLE_ESTIMATED }, // TFM | |
573 { 0x1139, 6, 6, CYCLE_ESTIMATED }, | |
574 { 0x113a, 6, 6, CYCLE_ESTIMATED }, | |
575 { 0x113b, 6, 6, CYCLE_ESTIMATED }, | |
576 | |
577 { 0x4d, 2, 1, 0 }, // TSTA | |
578 { 0x5d, 2, 1, 0 }, // TSTB | |
579 { 0x104d, 3, 2, 0 }, // TSTD | |
580 { 0x114d, 3, 2, 0 }, // TSTE | |
581 { 0x115d, 3, 2, 0 }, // TSTF | |
582 { 0x105d, 3, 2, 0 }, // TSTW | |
583 | |
584 { 0x0d, 6, 4, 0 }, // TST | |
585 { 0x6d, 6, 5, CYCLE_ADJ }, | |
586 { 0x7d, 7, 5, 0 }, | |
587 | |
588 { -1, -1 } | |
589 }; | |
590 | |
591 typedef struct | |
592 { | |
593 int cycles_6809_indexed; | |
594 int cycles_6309_indexed; | |
595 int cycles_6809_indirect; | |
596 int cycles_6309_indirect; | |
597 } indtab_t; | |
598 | |
599 static indtab_t indtab[] = | |
600 { | |
601 { 2, 1, -1, -1, }, // 0000 ,R+ | |
602 { 3, 2, 6, 6, }, // 0001 ,R++ [,R++] | |
603 { 2, 1, -1, -1, }, // 0010 ,-R | |
604 { 3, 2, 6, 6, }, // 0011 ,--R [,--R] | |
605 { 0, 0, 3, 3, }, // 0100 ,R [,R] | |
606 { 1, 1, 4, 4, }, // 0101 B,R [B,R] | |
607 { 1, 1, 4, 4, }, // 0110 A,R [A,R] | |
608 { 1, 1, 1, 1, }, // 0111 E,R [E,R] | |
609 { 1, 1, 4, 4, }, // 1000 n,R [n,R] | |
610 { 4, 3, 7, 7, }, // 1001 n,R [n,R] (16 bit) | |
611 { 1, 1, 1, 1, }, // 1010 F,R [F,R] | |
612 { 4, 2, 4, 4, }, // 1011 D,R [D,R] | |
613 { 1, 1, 4, 4, }, // 1100 n,PC [n,PC] | |
614 { 5, 3, 8, 8, }, // 1101 n,PC [n,PC] (16 bit) | |
615 { 4, 1, 4, 4, }, // 1110 W,R [W,R] | |
616 { -1, -1, 5, 5, }, // 1111 [n] (16 bit) | |
617 }; | |
618 | |
619 /* calculates additional ticks from post byte in both indexed and indirect modes */ | |
620 int lwasm_cycle_calc_ind(line_t *cl) | |
621 { | |
622 int pb = cl->pb; | |
623 | |
624 if ((pb & 0x80) == 0) /* 5 bit offset */ | |
625 return 1; | |
626 | |
627 if (pb & 0x10) /* indirect */ | |
628 return CURPRAGMA(cl, PRAGMA_6809) ? indtab[pb & 0xf].cycles_6809_indirect : indtab[pb & 0xf].cycles_6309_indirect; | |
629 else | |
630 return CURPRAGMA(cl, PRAGMA_6809) ? indtab[pb & 0xf].cycles_6809_indexed : indtab[pb & 0xf].cycles_6309_indexed; | |
631 } | |
632 | |
633 /* calculate additional ticks from post byte in rlist (PSHS A,B,X...) */ | |
634 int lwasm_cycle_calc_rlist(line_t *cl) | |
635 { | |
636 int i, cycles = 0; | |
637 | |
638 for (i = 0; i < 8; i++) | |
639 { | |
640 // 1 cycle for 8 bit regs CC-DP (bits 0-3) | |
641 // otherwise 2 | |
642 if (cl->pb & 1 << i) | |
643 cycles += (i <= 3) ? 1 : 2; | |
644 } | |
645 | |
646 return cycles; | |
647 } | |
648 | |
649 void lwasm_cycle_update_count(line_t *cl, int opc) | |
650 { | |
651 int i; | |
652 for (i = 0; 1; i++) | |
653 { | |
654 if (cycletable[i].opc == -1) return; | |
655 | |
656 if (cycletable[i].opc == opc) | |
657 { | |
658 cl->cycle_base = CURPRAGMA(cl, PRAGMA_6809) ? cycletable[i].cycles_6809 : cycletable[i].cycles_6309; | |
659 cl->cycle_flags = cycletable[i].flags; | |
660 cl->cycle_adj = 0; | |
661 | |
662 // long branches are estimated on 6809 | |
405
4c8925f97eb5
Fix bug identifying long branches in cycle counting code
William Astle <lost@l-w.ca>
parents:
385
diff
changeset
|
663 if (CURPRAGMA(cl, PRAGMA_6809) && (opc >= 0x1022 && opc <= 0x102f)) |
378 | 664 cl->cycle_flags |= CYCLE_ESTIMATED; |
665 | |
666 return; | |
667 } | |
668 } | |
669 } |